1. Field of the Invention
The present invention generally relates to a semiconductor memory device and a data processing system including the semiconductor memory device. More specifically, the present invention relates to a semiconductor memory device that includes a plurality of ports connected to a plurality of processors, shared memory region and dedicated memory region, wherein the shared memory region and the dedicated memory region are accessible by the plurality of processors, as well as to a data processing system including the semiconductor memory device.
Priority is claimed on Japanese Patent Application No. 2008-4304, filed Jan. 11, 2008, the content of which is incorporated herein by reference.
2. Description of the Related Art
In recent years, data processing systems to be devices such as terminal devices and mobile phones may often include a dynamic random access memory (DRAM). The dynamic random access memory can be used to transfer data between an application processor and a baseband processor. The application processor can be used to execute applications such as e-mail editor and Web-browser. The baseband processor can be used to execute the processing necessary for talking and communication.
The United States Patent Applications, First Publications, Nos. 2006/0161338 and 2006/0236041 and Japanese Unexamined Patent Application, First Publication No. 2007-35039 as well as Kyung woo Nam, et al, “A 512 Mb 2-Channel Mobile DRAM (OneDRAM™) with Shared Memory Array”, IEEE Asian Solid-State Circuits Conference, Korea, Nov. 12-14, 2007, 7-1, pp. 204-207, each disclose a multi-port DRAM. In general, the multi-port DRAM can perform high speed data transfer between the application processor and the baseband processor at a higher speed than when using a bus in the data processing system for the data transfer. Use of the multi-port DRAM can reduce the number of the necessary parts for the data transfer.